Publications

Conference Papers

• M. Shah, X. Yu, S. Di, M. Becchi, and F. Cappello, “A Portable, Fast, DCT-based Compressor for AI Accelerators”, In Proc. of the 33rd International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC 2024)
• R. Neff, M. Eghbali Zarch, M. Minutoli, M. Halappanavar, A. Tumeo, A. Kalyanaraman, M. Becchi, “FuseIM: Fusing Probabilistic Traversals for Influence  Maximization on Exascale Systems”, 38th ACM International Conference on Supercomputing (ICS 2024).
• SM Ferdous, R. Neff, B. Peng, S. Shuvo, M. Minutoli, S. Mukherjee, K. Kowalski, M. Becchi, M. Halappanavar, “Picasso: Memory-Efficient Graph Coloring Usin Palettes With Applications in Quantum Computing”, 38^th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2024)
• R. Neff, M. Minutoli, A. Tumeo, and M. Becchi. “2023. “High-Level Synthesis of Irregular Applications: A Case Study on Influence Maximization”, Proceedings of the 20th ACM International Conference on Computing Frontiers (CF 2023).
• M. Eghbali Zarch and M. Becchi, “A Code Transformation to Improve the Efficiency of OpenCL Code on FPGA through Pipes,” Proceedings of the 20th ACM International Conference on Computing Frontiers (CF 2023).
• M. Shah, X. Yu, S. Di, M. Becchi, and F. Cappello, “Lightweight Huffman Coding for Efficient GPU Compression”, Proceedings of the 37th International Conference on Supercomputing (ICS 2023).
• J. Ravi, S. Byna, M. Becchi, “In-transit Data Compression on Heterogeneous HPC Systems”, 23rd International Symposium on Cluster, Cloud and Internet Computing (CCGrid 2023)
• M. Shah, X. Yu, S. Di, D. Lykov, Y. Alexeev, M. Becchi, F. Cappello, “GPU-Accelerated Error-Bounded Compression Framework for Quantum Circuit Simulations”, 37^th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2023)
• J. Ravi, S. Byna, Q. Koziol, H. Tang, M. Becchi, “Evaluating Asynchronous Parallel IO on HPC Systems”, 37^th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2023)
• M. Nourian, Tri Nguyen, A. Chien, M. Becchi, “Data Transformation Acceleration using Deterministic Finite-State Transducers”, 2022 IEEE International Conference on Big Data (Big Data 2022) [acceptance rate=19.2%]
• T. Nguyen and M. Becchi, “A GPU-accelerated Data Transformation Framework Rooted in Pushdown Transducers”, IEEE International Conference on High Performance Computing, Data, and Analytics. (HiPC 2022) [acceptance rate=25%]
• M. Shah, R. Neff, H. Wu,  M. Minutoli, A. Tumeo, M. Becchi, “Accelerating Random Forest Classification on GPU and FPGA”, Proceedings of the 51st International Conference on Parallel Processing (ICPP 2022) [acceptance rate=27%]
• M. E. Zarch, R. Neff and M. Becchi, “Exploring Thread Coarsening on FPGA,” 2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics, December 2021 (HiPC 2021)
• J. Ravi, T. Nguyen, H. Zhou and M. Becchi, “PILOT: a Runtime System to Manage Multi-tenant GPU Unified Memory Footprint,” 2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics, December 2021 (HiPC 2021)

• M. Nourian, M. Eghbali Zarch, and M. Becchi, “Optimizing Complex OpenCL Code for FPGA: A Case Study on Finite Automata Traversal,“ in Proc. of 26th International Conference on Parallel and Distributed Systems (ICPADS 2020), Hong Kong, December 2020. 
• R. Gu and M. Becchi, “GPU-FPtuner: Mixed-precision Auto-tuning for Floating-point Applications on GPU,” in Proc. of 27th IEEE International Conference on High Performance Computing (HiPC 2020), December 2020.
• X. Yu, F. Wei, X. Ou , M. Becchi, T. Bicer , D. Yao, “GPU-Based Static Data-Flow Analysis for Fast and Scalable Android App Vetting,” in Proc. of 34th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2020), New Orleans, LA, May 2020.
• H. Wu and M. Becchi, “Evaluating Thread Coarsening and Low-cost Synchronization on Intel Xeon Phi,” in Proc. of 34th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2020), New Orleans, LA, May 2020.
• R. Gu, P. Beata and M. Becchi, “A Loop-aware Autotuner for High-Precision Floating-point Applications,” in Proc. of the 2020 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2020), Boston, MA, April 2020.
• A. Can Mert, E. Karabulut, E. Ozturk, E. Savas, M. Becchi, A. Aysu, “A Flexible and Scalable NTT Hardware: Applications from Homomorphically Encrypted Deep Learning to Post-Quantum Cryptography,” in Proc. of the Design, Automation, and Test in Europe Conference (DATE 2020), Grenoble, France, March 2020.
• R. Gu, P. Beata and M. Becchi, “Characterizing Performance/Accuracy Tradeoffs of High Precision Applications via Auto-tuning,” in Proc. of 2019 IEEE International Symposium on Workload Characterization (IISWC 2019), Orlando, FL, September 2019.
• R. Gu and M. Becchi, “A Comparative Study of Parallel Programming Frameworks for Distributed GPU Applications,” in Proc. of the 16th ACM International Conference on Computing Frontiers (CF 2019), Alghero, Italy, May 2019.
• M. Nourian, H. Wu and M. Becchi, “A Compiler Framework for Fixed-Topology Non-Deterministic Finite Automata on SIMD Platforms, “ in Proc. of 24th International Conference on Parallel and Distributed Systems (ICPADS 2018), Singapore, Singapore, December 2018. 
• H. Wu, J. Ravi and M. Becchi, “Compiling SIMT Programs on Multi- and Many-Core Processors with Wide Vector Units: A Case Study with CUDA,” in Proc. of 25th IEEE International Conference on High Performance Computing (HiPC 2018), Bengaluru, India, December 2018. [acceptance rate=33/151=21.9%]
• H. Wu, M. Becchi,  “An Analytical Study of Recursive Tree Traversal Patterns on Multi- and Many-core Platforms,” in Proc. of International Conference on Parallel and Distributed Systems (ICPADS 2017), Shenzen, China, December 2017.
• A. Todd, M. Nourian, M. Becchi, “A Memory-Efficient GPU Method for Hamming and Levenshtein Distance Similarity” in 24th IEEE International Conference on High Performance Computing, Data and Analytics (HiPC 2017), Jaipur, India, December 2017.  [acceptance rate=42/184=23%]
• S. Surineni, R. Gu, H. Huyen, M. Becchi, “Understanding the Performance-Accuracy Tradeoffs of Floating Point Arithmetic on GPUs,” in Proc. of 2017 IEEE International Symposium on Workload Characterization (IISWC 2017), Seattle, WA, October 2017. [acceptance rate=23/83=28%]
• M. Nourian, X. Wang, X. Yu, W.-c. Feng, M. Becchi, “Demistifying Automata Processing: GPUs, FPGAs or Micron’s AP?, ” in Proc. of the International Conference in Supercomputing (ICS 2017), Chicago, IL, June 2017. [acceptance rate=28/177=16%]
• A. Todd, H. Truong, J. Deters, J. Long, G. Conant, M. Becchi, “Parallel Gene Upstream Comparison via Multi-Level Hash Tables on GPU,” in Proc. of the 22nd IEEE International Conference on Parallel and Distributed Systems (ICPADS 2016), Wuhan, China.  [acceptance rate=30%]
• D. Li, X. Chen, M. Becchi and Z. Zong, “Evaluating the Energy Efficiency of Deep Convolutional Neural Networks on CPUs and GPUs,” in Proc. of the 2016 IEEE International Conference on Sustainable Computing and Communications (SustainCom 2016), Atlanta, GA, October 2016.
• W. Harrison, I. Graves, A. Procter, M. Becchi, G. Allwein, “A Programming Model for Reconfigurable Computing Based in Functional Concurrency,” in Proc of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016), Tallinn, Estonia, June 2016.
• K. Sajjapongse, R. Gu and M. Becchi, “IVM: A Task-based Shared Memory Programming Model and Runtime System to Enable Load Balancing and Uniform Access to Heterogeneous CPU-GPU Clusters,” In Proc. of the 13th ACM International Conference on Computing Frontiers (CF 2016), Como, Italy, May 2016. [acceptance rate=30/94=32%]
• H. Wu , D. Li and M. Becchi, “Compiler-Assisted Workload Consolidation For Efficient Dynamic Parallelism on GPU,” in Proc. of the 30th IEEE International Parallel & Distributed Processing Symposium submitted (IPDPS 2016), Chicago, IL, May 2016. [acceptance rate=114/496=23%]

• I. Roy, A. Srivastava, M. Nourian, M. Becchi and S. Aluru, “High Performance Pattern Matching Using the Automata Processor,” in Proc. of the 30th IEEE International Parallel & Distributed Processing Symposium submitted (IPDPS 2016), Chicago, IL, May 2016. [acceptance rate=114/496=23%]
• X. Yu, W.-C. Feng, D. Yao, and M. Becchi, “O3FA: A Scalable, Finite Automata-based, Pattern-Matching Engine for Out-of-Order Packet Inspection in IDS,” In Proc. of the 12th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2016), Santa Clara, CA, March 2016. [acceptance rate: 12/58 = 20.7%]

• M. Butler , K. Sajjapongse and M. Becchi, Improving Application Concurrency on GPUs by Managing Implicit and Explicit Synchronizations. In Proc. of the 21th IEEE International Conference on Parallel and Distributed Systems (ICPADS 2015), Melbourne, Australia, December 2015. [acceptance rate: 82/230 = 35.6%]
• K. Fang, T. Hoang, M. Becchi and A. Chien, Fast Support for Unstructured Data Processing: the Unified Automata. In Proc. of the 48th International Symposium on Microarchitecture (MICRO 2015), Waikiki, Hawaii, December 2015. [acceptance rate: 61/283 = 21.6%]
• D. Li, H. Wu and M. Becchi, Nested Parallelism on GPU: Exploring Parallelization Templates for Irregular Loops and Recursive Computations. In Proc. of the 44th International Conference on Parallel Processing (ICPP 2015), Beijing, China, September, 2015. [acceptance rate: 99/305 = 32.5%]
• A. Procter, W. Harrison, I. Graves, M. Becchi, and G. Allwein , Semantics Driven Hardware Design, Implementation, and Verification with ReWire. In Proc. of the ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools and Theory for Embedded Systems (LCTES 2015), Portland, Oregon, June 2015. [acceptance rate: 14/56 = 25%]
• I. Graves, A. Procter, W. Harrison, M. Becchi, G. Allwein, Hardware Synthesis from Functional Embedded Domain-Specific Languages: A Case Study in Regular Expression Compilation. In Proc. of the 11th International Symposium on Applied Reconfigurable Computing (ARC 2015), Bochum, Germany, April 2015.
• M. Becchi, A. Bremler-Barr, D. Hay, Y. Koral, and Kochba Omer, Accelerating Regular Expression Matching Over Compressed HTTP. In Proc. IEEE INFOCOM 2015, Hong Kong, April 2015. [acceptance rate: 316/1,640 = 19%]
• D. Li, S. Chakradhar and M. Becchi, GRapid: a Compilation and Runtime Framework for Rapid Prototyping of Graph Applications on Many-core Processors. In Proc. of the 20th IEEE International Conference on Parallel and Distributed Systems (ICPADS 2014), Hsinchu, Taiwan, December, 2014. [acceptance rate: 96/322 = 29.8%]
• K. Sajjapongse, T. Agarwal and M. Becchi, A Flexible Scheduling Framework for Heterogeneous CPU-GPU Clusters. In Proc. of the 21st annual IEEE International Conference on High Performance Computing (HiPC 2014), Goa, India, December, 2014. [acceptance rate: 49/216 = 23%]
• X. Chen, B. Jones, M. Becchi, and T. Wolf, Picking Pesky Parameters: Optimizing Regular Expression Matching in Practice. In Proc. of the 2013 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2013), San Jose, CA, October, 2013.
• D. Li , K. Sajjapongse, H. Truong, G. Conant and M. Becchi, A Distributed CPU-GPU Framework for Pairwise Alignments on Large-Scale Sequence Datasets. In Proc. of the 24th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2013), Ashburn, VA, June 2013. [acceptance rate (full papers): 19.2%]
• K. Sajjapongse, X. Wang and M. Becchi, A Preemption-based Runtime to Efficiently Schedule Multi-process Applications on Heterogeneous Clusters with GPUs. In Proc. of the 22nd International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC 2013), New York, NY, June 2013. [acceptance rate: 15.3%]
• X. Yu and M. Becchi, GPU Acceleration of Regular Expression Matching for Large Datasets: Exploring the Implementation Space. In Proc. of the 10th ACM International Conference on Computing Frontiers (CF 2013), Ischia, Italy, May 2013.
• D. Li and M. Becchi, Deploying Graph Algorithms on GPUs: an Adaptive Solution. In Proc. of the 27th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2013), Boston, MA, May 2013. [acceptance rate: 106/494 = 21%]
• C. Hathhorn, M. Becchi, W. L. Harrison, and A. Procter, Verification of Heterogeneous CUDA-C Programs: a Semantic Approach. In Proc. of System Software Verification Conference (SSV 2012), Sydney, Australia, November 2012.
• V. Ravi, M. Becchi, G. Agrawal and S. Chakradhar, ValuePack: Value-Based Scheduling Framework for CPU-GPU Clusters. In Proc. of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC 2012), Salt Lake City, UT, November 2012. [acceptance rate: 21%]
• M. Becchi, K. Sajjapongse, I. Graves, A. Procter, V. Ravi and S. Chakradhar, A Virtual Memory Based Runtime to Support Multi-tenancy in Clusters with GPUs. In Proc. of the 21st International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC 2012), Delft, The Netherlands, June 2012. [acceptance rate: 16%] Best Paper Award
• V. Ravi, M. Becchi, W. Jiang, G. Agrawal and S. Chakradhar, Scheduling Concurrent Applications on a Cluster of CPU-GPU Nodes. In Proc. of the 12th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID 2012), Ottawa, Canada, May 2012. [acceptance rate: 83/302 = 27.5%] Best Student Paper Award
• V. Ravi, M. Becchi, G. Agrawal and S. Chakradhar, Supporting GPU Sharing in Cloud Environments with a Transparent Runtime Consolidation Framework. In Proc. of the 20th International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC 2011), San Jose, CA, June 2011. [acceptance rate: 22/170 = 13%] Best Paper Award
• S. Cadambi, A. Majumdar, M. Becchi, H. P. Graf and S. Chakradhar, A Programmable Parallel Accelerator for Learning and Classification. In Proc. of the 19th Conference on Parallel Architectures and Compilation Techniques (PACT 2010), Vienna, Austria, September 2010. [acceptance rate: 17%]
• M. Becchi, S. Byna, S. Cadambi and S. Chakradhar, Data-Aware Scheduling of Legacy Kernels on Heterogeneous Platforms with Distributed Memory. In Proc. of the 22nd ACM Symposium on Parallelism in Algorithms and Architectures (SPAA 2010), Santorini, Greece, June 2010. [acceptance rate: 32%]
• M. Becchi, C. Wiseman and P. Crowley, Evaluating Regular Expression Matching Engines on Network and General Purpose Processors. In Proc. of the 2009 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2009), Princeton, NJ, October, 2009. [acceptance rate: 23.3%]
• M. Becchi and P. Crowley, Extending Finite Automata to Efficiently Match Perl-Compatible Regular Expressions. In Proc. of the International Conference on emerging Networking EXperiments and Technologies (CoNEXT 2008), Madrid, Spain, December 2008. [acceptance rate: 17.5%]
• M. Becchi and P. Crowley, Efficient Regular Expression Evaluation: Theory to Practice. In Proc. of the 2008 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2008), San Jose, CA, November, 2008. [acceptance rate: 25.4%]
• C. Wiseman, J. Turner, M. Becchi et al, A Remotely Accessible Network Processor-Based Router for Network Experimentation. In Proc. of the 2008 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2008), San Jose, CA, November, 2008. [acceptance rate: 25.4%]
• M. Becchi, M. Franklin and P. Crowley, A Workload for Evaluating Deep Packet Inspection Architectures. In Proc. of the 2008 IEEE International Symposium on Workload Characterization (IISWC 2008), Seattle, WA, September, 2008. [acceptance rate: 34%]
• M. Becchi and P. Crowley, A Hybrid Finite Automaton for Practical Deep Packet Inspection. In Proc. of the International Conference on emerging Networking EXperiments and Technologies (CoNEXT 2007), New York, NY, December 2007. [acceptance rate: 19.6%]
• M. Becchi and P. Crowley, An Improved Algorithm to Accelerate Regular Expression Evaluation. In Proc. of IEEE/ACM Symposium on Architectures for Networking and Communications Systems (ANCS 2007), Orlando, FL, December 2007. [acceptance rate: 28.5%]
• M. Becchi, M. Franklin and P. Crowley, Performance/area Efficiency in Embedded Chip Multiprocessors with Micro-caches. In Proc. of the 4th ACM Int’l Conference on Computing Frontiers (CF 2007), Ischia, Italy, May, 2007. [acceptance rate: 50%]
• M. Becchi and S. Cadambi, Memory-Efficient Regular Expression Search Using State Merging. In Proc. IEEE INFOCOM 2007, Anchorage, AK, May 2007. [acceptance rate: 18%]
• S. Kumar, M. Becchi, P. Crowley and Jonathan Turner, CAMP: Fast and Efficient IP Lookup Architecture. In Proc. of IEEE/ACM Symposium on Architectures for Networking and Communications Systems (ANCS 2006), San Jose, CA, December, 2006. [acceptance rate: 19.6%]
• M. Becchi and P. Crowley, Dynamic Thread Assignment on Heterogeneous Multiprocessor Architectures. In Proc. of the 3rd ACM Int’l Conference on Computing Frontiers (CF 2006), Ischia, Italy. May 2006. [acceptance rate: 25%]
• M. Becchi, Towards Configurable and Adaptable Distributed Event Dispatching. In Proc. Of Design and Analysis of Distributed Systems (DASD 2004), Washington DC, April 2004.

Journal Articles

• I. Roy, A. Srivastava, M. Grimm, M. Nourian, M. Becchi and S. Aluru, “Evaluating High Performance Pattern Matching on the Automata Processor,” in IEEE Transactions on Computers (TOC), vol. 68, no. 8, pp. 1201-1212, 1 Aug. 2019.​, February 2019.
• A. Procter, W. Harrison, I. Graves, M. Becchi, G. Allwein, “A Principled Approach to Secure Multi-core Processor Design with ReWire,” in ACM Transactions on Embedded Computing Systems (TECS) 16(2): 33:1-33:25 (2017).
• X. Chen, B. Jones, M Becchi, T. Wolf, “Picking Pesky Parameters: Optimizing Regular Expression Matching in Practice,” in IEEE Transactions on Parallel and Distributed Systems (TPDS) 27(5): 1430-1442 (2016).
• X. Yu, B. Lin and M. Becchi, Revisiting State Blow-up: Automatically Building Augmented-FA while Preserving Functional Equivalence. In IEEE Journal on Selected Areas in Communications (JSAC), vol.32, no.10, pp.1822-1833, Oct. 2014.
• H. Truong, D. Li , K. Sajjapongse, G. Conant and M. Becchi, Large-Scale Pairwise Alignments on GPU Clusters: Exploring the Implementation Space. In The Journal of Signal Processing Systems, Volume 77, Issue 1-2, pp 131-149, October 2014.
• M. Ellison, G. Conant, R. Cockrum, K. Austin, H. Truong, M. Becchi, W. Lamberson and K. Cammack, Diet Alters Both the Structure and Taxonomy of the Ovine Gut Microbial Ecosystem. In DNA Research, October 29, 2013, 2013.
• V. Ravi, M. Becchi, W. Jiang, G. Agrawal and S. Chakradhar, Scheduling concurrent applications on a cluster of CPU–GPU nodes. In Future Generation Computer Systems 29 (2013) pp. 2262-2271.
• M. Becchi and P. Crowley, A-DFA: a Low-complexity Compression Algorithm for Efficient Regular Expression Evaluation. In ACM Transactions on Architecture and Code Optimization (TACO), vol. 10, issue 1, art. 4, April 2013.
• B. Pang, N. Zhao, M. Becchi, D. Korkin and C.-R. Shyu, Accelerating Large-scale Protein Structure Alignments with Graphics Processing Units. In BMC Research Notes, February 2012.
• A. Majumdar, S. Cadambi, M. Becchi, S. T. Chakradhar and H. P. Graf, A Massively Parallel, Energy Efficient Programmable Accelerator for Learning and Classification. In ACM Transactions on Architecture and Code Optimization (TACO), vol. 9, issue 1, art. 6, March 2012.
• M. Becchi and P. Crowley, Dynamic Thread Assignment on Heterogeneous Multiprocessor Architectures. In The Journal of Instruction-Level Parallelism (JILP), vol. 10, June, 2008.

Workshop Papers, Short Papers & Posters

• T. Nguyen and M. Becchi, “PDTgcomp: Compilation Framework for Data Transformation Kernels on GPU”, International Conference for High Performance Computing, Networking, Storage, and Analysis – Posters Program (SC 2022) [poster]
• R. Neff, M. Minutoli, A. Tumeo, M. Halappanavar, M. Becchi, “Exploring FPGA Acceleration of Seed Selection in Influence Maximization”, International Conference for High Performance Computing, Networking, Storage, and Analysis – Posters Program (SC 2022) [poster]
• M. Shah, X. Yu, S. Di, M. Becchi, F. Cappello, “Exploring FPGA Acceleration of Seed Selection in Influence Maximization”, International Conference for High Performance Computing, Networking, Storage, and Analysis (SC 2022) – ACM SRC Posters Program 2^nd price at ACM Student Research Competition [poster and talk]
• J. Ravi, “Toward Scalable Middleware for Shared HPC Resources”, International Conference for High Performance Computing, Networking, Storage, and Analysis – Doctoral Showcase Program (SC 2022) [poster and talk]
• R. Neff, M. Minutoli, A. Tumeo and M. Becchi, “FPGA-Accelerated Ripples”: presented at International Conference for High Performance Computing, Networking, Storage and Analysis (SC 21) – poster presentation [poster]
• M. Nourian, M. Eghbali and M. Becchi, “Porting Finite State Automata Traversal from GPU to FPGA: Exploring the Implementation Space,” International Conference for High Performance, Networking, Storage, and Analysis (SC 2019), Denver, CO, November 2019 [poster]
• M. Nourian and M. Becchi, “Analysis of Automata Processing Acceleration on Disparate Hardware Technologies,” International Conference for High Performance, Networking, Storage, and Analysis (SC 2019), Doctoral Showcase Program, Denver, CO, November 2019 [poster]

• R. Gu, P. Beata and M. Becchi, “Floating-point Autotuner for CPU-based Mixed-precision Applications,” International Conference for High Performance
  Computing, Networking, Storage, and Analysis (SC 2018), Dallas, TX, November 2018 [poster]
• M. Nourian, H. Wu and M. Becchi, “A Compiler Framework for Fixed-topology Non-deterministic Finite Automata on SIMD Platforms,” International Conference for High Performance Computing, Networking, Storage, and Analysis (SC 2018), Dallas, TX, November 2018 [poster]
• H. Wu, J. Ravi and M. Becchi, “Compiling SIMT Programs on Multi- and Many-core Processors with Wide Vector Units: A Case Study with CUDA,” International Conference for High Performance, Networking, Storage, and Analysis (SC 2018), Dallas, TX, November 2018 [poster]
• H. Wu, and M. Becchi, “Efficient Deployment of Irregular Computations on Multi- and Many-Core Architectures,” International Conference for High Performance, Networking, Storage, and Analysis (SC 2018), Doctoral Showcase Program, Dallas, TX, November 2018 
• J. Ravi, C. Laplante and M. Becchi, “Accelerating Microscope Data Analysis Using Parallel Computing,” International Conference for High Performance, Networking, Storage, and Analysis (SC 2018), ACM Student Research Competition, Dallas, TX, November 2018 (finalist) [poster]
• D. Li and M. Becchi, ”Facilitating Irregular Applications on Many-core Processors,” International Conference for High Performance Computing, Networking, Storage and Analysis (SC 2015), Doctoral Showcase Program, New Orleans, LA, November 2015. 
• M. Butler and M. Becchi, “Improving Application Concurrency on GPUs by Managing Implicit and Explicit Synchronizations, “ in International Conference for High Performance Computing, Networking, Storage and Analysis (SC 2015), ACM Student Research Competition, November 2015 (finalist). [poster and talk]
• D. Chapp, T. Johnston, M. Becchi, and M. Taufer, Numerical Reproducibility Challenges on Extreme Scale Multi-Threading GPUs. GPU Technology Conference (GTC 2015), San Jose, CA, March 2015. (talk).
• D. Li and M. Becchi, Designing Code Variants for Applications with Nested Parallelism on GPUs. GPU Technology Conference (GTC 2015), San Jose, CA, March 2015. (poster).
• D. Li, H. Wu, and M. Becchi, Exploiting Dynamic Parallelism to Efficiently Support Irregular Nested Loops on GPUs. In Proc. of the International Workshop on Code Optimisation for Multi and Many Cores (COSMIC 2015), San Francisco, CA, February 2015. (paper).
• K. Sajjapongse and M. Becchi, Hierarchical Scheduling Frameworks for Heterogeneous Clusters with GPUs. In Proc. of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC 2014) – Doctoral Showcase Program, New Orleans, LA, November 2014. (poster and talk).
• T. Agarwal and M. Becchi, Design of a Hybrid MPI-CUDA Benchmark Suite for CPU-GPU Clusters. In Proc of the 23rd International Conference on Parallel Architectures and Compilation Techniques (PACT 2014), Edmonton, Canada, August 2014. Winner of ACM Student Research Competition
• K. Sajjapongse and M. Becchi, Design of a Virtualization Framework to Enable GPU Sharing in Cluster Environments. GPU Technology Conference (GTC 2014), San Jose, CA, March 2014. (talk).
• A. Procter, W. Harrison, I. Graves, M. Becchi and G. Allwein, Semantics-directed Machine Architecture in ReWire. In Proc. of the 2013 International Conference on Field Programmable Technology (ICFPT 2013), Kyoto, Japan, December 2013. (short paper)
• M. Becchi, K. Sajjapongse, I. Graves, A. Procter, V. Ravi, S. Chakradhar, Node-Level Runtime System to Support Multi-tenancy in Clusters with GPUs. GPU Technology Conference (GTC 2013), San Jose, CA, March 2013. (poster).
• X. Yu and M. Becchi, Exploring Different Automata Representations for Efficient Regular Expression Matching on GPU. In Proc. of the 18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPOPP 2013), Shenzhen, China, February 2013 (poster).
• D. Li and M. Becchi, Multiple Pairwise Sequence Alignments with the Needleman-Wunsch Algorithm on GPU. In Proc. of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC 2012), Salt Lake City, UT, November 2012 (poster).
• D. Li and M. Becchi, Software Support for Regular and Irregular Applications in Parallel Computing. In Proc. of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC 2012) – Early Doctoral Showcase Program, Salt Lake City, UT, November 2012 (poster).
• K. Sajjapongse and M. Becchi, An Efficient Runtime Technology for Many-Core Device Virtualization in Clusters. In Proc. of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC 2012) – Early Doctoral Showcase Program, Salt Lake City, UT, November 2012 (poster).
• M. Poostchi, K. Palaniappan, F. Bunyak, M. Becchi, G. Seetharaman. Efficient GPU Implementation of the Integral Histogram. In Proc. of the ACCV 2012 Workshop on Developer-Centred Computer Vision (DCCV 2012), Daejeon, Korea, November 2012. (workshop paper)
• M. Becchi, S. Cadambi and S. T. Chakradhar, Enabling Legacy Applications on Heterogeneous Platforms. In Proc. of the 2nd USENIX Workshop on Hot Topics in Parallelism (HotPar 2010), Berkeley, CA, June 2010. (workshop paper)

Patents

• Patent number: 9335981; Inventors:  Srimat T. Chakradhar,Michela Becchi, Da Li, Title: “Source-to-source transformations for graph processing on many-core platforms“; Issue date: May 10, 2016.
• Patent number: 8917279; Inventors:  Michela Becchi, Kittisak Sajjapongse, Srimat T. Chakradhar; Title: “Method and system to dynamically bind and unbind applications on a general purpose graphics processing unit”; Issue date: December 23, 2014.
• Patent number: 8806503; Inventors:  Michela Becchi, Kittisak Sajjapongse, Srimat T. Chakradhar; Title: “Method and System for Memory Aware Runtime to Support Multitenancy in Heterogeneous Clusters”, Issue date: August 12, 2014.
• Patent number: 8583896; Inventors: Srihari Cadambi, Abhinandan Majumdar, Michela Becchi, Srimat Chakradhar, Hans Peter Graf; Title: “Massively parallel processing core with plural chains of processing elements and respective smart memory storing select data received from each chain”; Issue date: November 12, 2013.
• Patent number: 8375392; Inventors: Michela Becchi, Surendra Byna, Srihari Cadambi, Srimat Chakradhar; Title: “Data aware scheduling on heterogeneous platforms”; Issue date: February 12, 2013.